Publications
International Conference Papers
- Optimization of the Modified Gaussian Filter for Mobile GPU Usage in Game Workloads
Jieui Kang, Jaehyeong Sim, Hyokyung Bahn
International Conference on Communications, Computing, Cybersecurity, and Informatics (CCCI), 2023 [DOI]
- TD-NAAS: Template-Based Differentiable Neural Architecture Accelerator Search
HaYoung Lim, Yeseo Jang, Juyeon Kim, Jaehyeong Sim
20th International SoC Conference (ISOCC), 2023
- A 47.4uJ/Epoch Trainable Deep Convolutional Neural Network Accelerator for In-Situ Personalization on Smart Devices
Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim
IEEE Asian Solid-State Circuits Conference (A-SSCC), 2019 [DOI]
- eSRCNN: A Framework for Optimizing Super-Resolution Tasks on Diverse Embedded CNN Accelerators
Youngbeom Jung, Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim
IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%, Top-Tier)
- A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks
Hyein Shin, Jaehyeong Sim, Daewoong Lee, Lee-Sup Kim
IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%, Top-Tier)
- An Energy-efficient Processing-in-Memory Architecture for Long Short Term Memory in a Spin Orbit Torque MRAM
Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim
IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%, Top-Tier)
- NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks
Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim
IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2019 [DOI] (acceptance rate: 19.7%, Top-Tier)
- NID: Processing Binary Convolutional Neural Network in Commodity DRAM
Jaehyeong Sim, Hoseok Seol, Lee-Sup Kim
IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2018 [DOI] (acceptance rate: 24.5%, Top-Tier)
- TrainWare: A Memory Optimized Weight Update Architecture for On-Device Convolutional Neural Network Training
Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim
ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2018 [DOI]
- A Kernel Decomposition Architecture for Binary-weight Convolutional Neural Networks
Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim
ACM/IEEE Design Automation Conference (DAC), 2017 [DOI] (acceptance rate: 24.3%, Top-Tier)
- SENIN: An Energy-Efficient Sparse Neuromorphic System
Myunghoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim
ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2017 [DOI]
- A 1.42TOPS/W Deep Convolutional Neural Network Recognition Processor for Intelligent IoE Systems
Jaehyeong Sim, Jun-Seok Park, Minhye Kim, Dongmyung Bae, Yeongjae Choi, Lee-Sup Kim
IEEE International Solid-State Circuit Conference (ISSCC, Top-Tier), 2016 [DOI]
- Timing Error Masking by Exploiting Operand Value Locality in SIMD Architecture (Best Paper Award)
Jaehyeong Sim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim
IEEE International Conference on Computer Design (ICCD), 2014 [DOI]
- PowerField: A Transient Temperature-to-Power Technique based on Markov Random Field Theory
Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim
ACM/IEEE Design Automation Conference (DAC), 2012 [DOI] (acceptance rate: 22.1%, Top-Tier)
International Journal Papers
- S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity
Myeonggu Kang, Hyeonuk Kim, Hyein Shin, Jaehyeong Sim, Kyeonghan Kim, Lee-Sup Kim
IEEE Transactions on Computers, Jun. 2022 [DOI]
- CREMON: Cryptography Embedded on the Convolutional Neural Network Accelerator
Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim
IEEE Transactions on Circuits and Systems II, Dec. 2020 [DOI]
- An Energy-Efficient Deep Convolutional Neural Network Training Accelerator for In-Situ Personalization on Smart Devices
Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim
IEEE Journal of Solid-State Circuits, Oct. 2020 [DOI]
- An Energy-Efficient Deep Convolutional Neural Network Inference Processor with Enhanced Output Stationary Dataflow in 65-nm CMOS
Jaehyeong Sim, Somin Lee, Lee-Sup Kim
IEEE Transactions on Very Large Scale Integration Systems, Jan. 2020 [DOI]
- Energy-efficient Design of Processing Element for Convolutional Neural Network
Yeongjae Choi, Dongmyung Bae, Jaehyeong Sim, Seungkyu Choi, Minhye Kim, Lee-Sup Kim
IEEE Transactions on Circuits and Systems II, Nov. 2017 [DOI]
- A 5 Gb/s 2.67 mW/Gb/s Digital Clock and Data Recovery with Hybrid Dithering Using a Time-Dithered Delta-Sigma Modulator
Taeho Lee, Yong-Hun Kim, Jaehyeong Sim, Jun-Seok Park, Lee-Sup Kim
IEEE Transactions on Very Large Scale Integration Systems, Apr. 2016 [DOI]
- PowerField: A Probabilistic Approach for Temperature-to-Power Conversion based on Markov Random Field Theory
Seungwook Paek, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Oct. 2013 [DOI]
Domestic Papers
- ToMato: Token Merging을 이용한 Vision Transformer 가속화 (학부생 논문경진대회 장려상)
권수영, 권민서, 김효진, 심재형
대한전자공학회 추계학술대회, 2023
- QTNAAS: 템플릿 기반 양자화된 신경망 구조 및 가속기 탐색 프레임워크
임하영, 김경미, 장예서, 김주연, 심재형
대한전자공학회 추계학술대회, 2023
- 게임 워크로드에 최적화된 모바일 GPU 설계방안 연구
강지의, 심재형, 반효경
한국소프트웨어종합학술대회, 2022
- 딥러닝 기반의 MBTI 성격유형 분류 연구
김정민, 박지민, 이로운, 조서원, 심재형
한국통신학회 학술대회논문집, 2022
International Patents
- METHOD AND APPARATUS WITH DEEP LEARNING OPERATIONS, US20220164164, Patent Published.
- COMPUTING DEVICE AND METHOD, US20220083390, Patent Published.
- ACCELERATOR, METHOD OF OPERATING AN ACCELERATOR, AND ELECTRONIC DEVICE INCLUDING AN ACCELERATOR, US11741026B2, Patent Granted.
- Neural network method and apparatus, US10699160B2, Patent Granted.
Domestic Patents
- 가우시안 플러스 필터에 기반하는 이미지 처리장치 및 그 방법, 10-2023-0157656, 특허 출원
- 캡슐 네트워크의 스쿼시 함수 탐색장치 및 그 방법, 10-2023-0121855, 특허 출원
- 프로세싱 장치, 컴퓨팅 장치, 및 프로세싱 장치의 동작 방법, 10-2020-0117000, 특허 출원 (공개)
- 가속기, 가속기의 동작 방법 및 이를 포함한 전자 장치, 10-2022-0028899, 특허 출원 (공개)
- 뉴럴 네트워크의 컨볼루션 연산을 수행하는 방법 및 장치, 1024529510000, 특허 등록