Publications

International Conference Papers

  1. A 47.4uJ/Epoch Trainable Deep Convolutional Neural Network Accelerator for In-Situ Personalization on Smart Devices
    Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim
    IEEE Asian Solid-State Circuits Conference (A-SSCC), 2019 [DOI]
  2. eSRCNN: A Framework for Optimizing Super-Resolution Tasks on Diverse Embedded CNN Accelerators
    Youngbeom Jung, Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%)
  3. A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks
    Hyein Shin, Jaehyeong Sim, Daewoong Lee, Lee-Sup Kim
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%)
  4. An Energy-efficient Processing-in-Memory Architecture for Long Short Term Memory in a Spin Orbit Torque MRAM
    Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2019 [DOI] (acceptance rate: 23.9%)
  5. NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks
    Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim
    IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2019 [DOI] (acceptance rate: 19.7%)
  6. NID: Processing Binary Convolutional Neural Network in Commodity DRAM
    Jaehyeong Sim, Hoseok Seol, Lee-Sup Kim
    IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2018 [DOI] (acceptance rate: 24.5%)
  7. TrainWare: A Memory Optimized Weight Update Architecture for On-Device Convolutional Neural Network Training
    Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim
    ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2018 [DOI]
  8. A Kernel Decomposition Architecture for Binary-weight Convolutional Neural Networks
    Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim
    ACM/IEEE Design Automation Conference (DAC), 2017 [DOI] (acceptance rate: 24.3%)
  9. SENIN: An Energy-Efficient Sparse Neuromorphic System
    Myunghoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim
    ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2017  [DOI]
  10. A 1.42TOPS/W Deep Convolutional Neural Network Recognition Processor for Intelligent IoE Systems
    Jaehyeong Sim, Jun-Seok Park, Minhye Kim, Dongmyung Bae, Yeongjae Choi, Lee-Sup Kim
    IEEE International Solid-State Circuit Conference (ISSCC), 2016  [DOI]
  11. Timing Error Masking by Exploiting Operand Value Locality in SIMD Architecture
    Jaehyeong Sim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim
    IEEE International Conference on Computer Design (ICCD), 2014  [DOI]
  12. PowerField: A Transient Temperature-to-Power Technique based on Markov Random Field Theory
    Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim
    ACM/IEEE Design Automation Conference (DAC), 2012  [DOI] (acceptance rate: 22.1%)

International Journal Papers

  1. S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity
    Myeonggu Kang, Hyeonuk Kim, Hyein Shin, Jaehyeong Sim, Kyeonghan Kim, Lee-Sup Kim
    IEEE Transactions on Computers, Jun. 2022 [DOI]
  2. CREMON: Cryptography Embedded on the Convolutional Neural Network Accelerator
    Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim
    IEEE Transactions on Circuits and Systems II, Dec. 2020 [DOI]
  3. An Energy-Efficient Deep Convolutional Neural Network Training Accelerator for In-Situ Personalization on Smart Devices
    Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim
    IEEE Journal of Solid-State Circuits, Oct. 2020 [DOI]
  4. An Energy-Efficient Deep Convolutional Neural Network Inference Processor with Enhanced Output Stationary Dataflow in 65-nm CMOS
    Jaehyeong Sim, Somin Lee, Lee-Sup Kim
    IEEE Transactions on Very Large Scale Integration Systems, Jan. 2020 [DOI]
  5. Energy-efficient Design of Processing Element for Convolutional Neural Network
    Yeongjae Choi, Dongmyung Bae, Jaehyeong Sim, Seungkyu Choi, Minhye Kim, Lee-Sup Kim
    IEEE Transactions on Circuits and Systems II, Nov. 2017  [DOI]
  6. A 5 Gb/s 2.67 mW/Gb/s Digital Clock and Data Recovery with Hybrid Dithering Using a Time-Dithered Delta-Sigma Modulator
    Taeho Lee, Yong-Hun Kim, Jaehyeong Sim, Jun-Seok Park, Lee-Sup Kim
    IEEE Transactions on Very Large Scale Integration Systems, Apr. 2016  [DOI]
  7. PowerField: A Probabilistic Approach for Temperature-to-Power Conversion based on Markov Random Field Theory
    Seungwook Paek, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Oct. 2013  [DOI]

Domestic Papers

  1. 게임 워크로드에 최적화된 모바일 GPU 설계방안 연구
    강지의, 심재형, 반효경
    한국소프트웨어종합학술대회, 2022
  2. 딥러닝 기반의 MBTI 성격유형 분류 연구
    김정민, 박지민, 이로운, 조서원, 심재형
    한국통신학회 학술대회논문집, 2022

International Patents

  1. METHOD AND APPARATUS WITH DEEP LEARNING OPERATIONS, US20220164164, Patent Published.
  2. COMPUTING DEVICE AND METHOD, US20220083390, Patent Published.
  3. ACCELERATOR, METHOD OF OPERATING AN ACCELERATOR, AND ELECTRONIC DEVICE INCLUDING AN ACCELERATOR, US20220066960, Patent Published.
  4. Neural network method and apparatus, US10699160B2, Patent Granted.

Domestic Patents

  1. Method and apparatus for performing convolution operation in neural network, KR-10-2017-0135246, Patent Published.